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| author | Imre Deak <imre.deak@intel.com> | 2024-10-30 21:23:10 +0200 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2024-11-06 18:13:31 +0200 |
| commit | 734148a1d8d1ff00b1f31a44f20bf013f820e8e0 (patch) | |
| tree | 91a38659ef611a20fdc089f69077da92ead1fa9c /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | drm/i915/ptl/dp_mst: Fix slave transcoder enabling wrt. DDI function (diff) | |
| download | linux-734148a1d8d1ff00b1f31a44f20bf013f820e8e0.tar.gz linux-734148a1d8d1ff00b1f31a44f20bf013f820e8e0.zip | |
drm/i915/adlp+/dp_mst: Align slave transcoder enabling with spec wrt. DDI function
On ADLP+ during modeset enabling configure the DDI function without
enabling it for MST slave transcoders before programming the data and
link M/N values. The DDI function gets enabled separately later in the
transcoder enabling sequence.
Align the code with the spec based on the above.
v2: Move this patch earlier in the series, addressing the DP2
config fixes for all ADLP+ platforms later.
Bspec: 55424, 54128, 65448, 68849
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241030192313.4030617-3-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index bd5a5956123a..13449c85162d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -1224,7 +1224,7 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state, if (DISPLAY_VER(dev_priv) < 12 || !first_mst_stream) intel_ddi_enable_transcoder_clock(encoder, pipe_config); - if (DISPLAY_VER(dev_priv) >= 30 && !first_mst_stream) + if (DISPLAY_VER(dev_priv) >= 13 && !first_mst_stream) intel_ddi_config_transcoder_func(encoder, pipe_config); intel_dsc_dp_pps_write(&dig_port->base, pipe_config); |