diff options
| author | Lewis Huang <Lewis.Huang@amd.com> | 2018-11-16 19:12:46 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-01-14 15:04:34 -0500 |
| commit | ebd084cd6509313307bc3b8fd9695f65aee8ff96 (patch) | |
| tree | 49b1d484fa677b7c88f9cbf7bfdc6f34ae697bdf /drivers/gpu/drm | |
| parent | drm/amd/display: implement dc_init_callbacks to assign callback pointers afte... (diff) | |
| download | linux-ebd084cd6509313307bc3b8fd9695f65aee8ff96.tar.gz linux-ebd084cd6509313307bc3b8fd9695f65aee8ff96.zip | |
drm/amd/display: add plane size change check condition
[Why]
Driver didn't check plane size and surface size is mismatch.
It will cause pitch data incorrect.
[How]
Add condition to check is plane change and update surface
Signed-off-by: Lewis Huang <Lewis.Huang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 |
3 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index e12612be118d..ce34e3e0c31f 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -1220,6 +1220,12 @@ static enum surface_update_type get_plane_info_update_type(const struct dc_surfa */ update_flags->bits.bpp_change = 1; + if (u->plane_info->plane_size.grph.surface_pitch != u->surface->plane_size.grph.surface_pitch + || u->plane_info->plane_size.video.luma_pitch != u->surface->plane_size.video.luma_pitch + || u->plane_info->plane_size.video.chroma_pitch != u->surface->plane_size.video.chroma_pitch) + update_flags->bits.plane_size_change = 1; + + if (memcmp(&u->plane_info->tiling_info, &u->surface->tiling_info, sizeof(union dc_tiling_info)) != 0) { update_flags->bits.swizzle_change = 1; diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 580f752920d1..b4ad48b0bff3 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -445,6 +445,7 @@ union surface_update_flags { uint32_t coeff_reduction_change:1; uint32_t output_tf_change:1; uint32_t pixel_format_change:1; + uint32_t plane_size_change:1; /* Full updates */ uint32_t new_plane:1; diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index edb382e1eaeb..03835dcd28a2 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -2125,7 +2125,8 @@ void update_dchubp_dpp( plane_state->update_flags.bits.swizzle_change || plane_state->update_flags.bits.dcc_change || plane_state->update_flags.bits.bpp_change || - plane_state->update_flags.bits.scaling_change) { + plane_state->update_flags.bits.scaling_change || + plane_state->update_flags.bits.plane_size_change) { hubp->funcs->hubp_program_surface_config( hubp, plane_state->format, |