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| author | Thomas Hellström <thomas.hellstrom@linux.intel.com> | 2025-04-02 14:29:24 +0200 |
|---|---|---|
| committer | Thomas Hellström <thomas.hellstrom@linux.intel.com> | 2025-04-03 12:23:28 +0200 |
| commit | 32cb8dc550e469facfe54e8fa3b5d8d01448d5df (patch) | |
| tree | bc073ea46fffc64ce0d6444efe9981232777b0a6 /drivers/gpu | |
| parent | 89f306dc6dfdc57cf138d10e9f4c4fea76d6d949 (diff) | |
| download | linux-32cb8dc550e469facfe54e8fa3b5d8d01448d5df.tar.gz linux-32cb8dc550e469facfe54e8fa3b5d8d01448d5df.zip | |
drm/xe: Fix xe_pt_stage_bind_walk kerneldoc
The structure was missing a proper kerneldoc header and once
that was added a number of typos and errors became obvious.
Fix those.
Reported-by: Lucas De Marchi <lucas.demarchi@intel.com>
Closes: https://lore.kernel.org/intel-xe/x53tcs5bjldw6lcorjemuheklxcmepdvr2u7lvt3hpqrzqoc4h@nsu6hs25taqj/
Fixes: b2d4b03b03a7 ("drm/xe: Make the PT code handle placement per PTE rather than per vma / range")
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20250402122924.25526-1-thomas.hellstrom@linux.intel.com
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pt.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c index 82ae159feed1..33839b25d708 100644 --- a/drivers/gpu/drm/xe/xe_pt.c +++ b/drivers/gpu/drm/xe/xe_pt.c @@ -269,8 +269,11 @@ struct xe_pt_update { bool preexisting; }; +/** + * struct xe_pt_stage_bind_walk - Walk state for the stage_bind walk. + */ struct xe_pt_stage_bind_walk { - /** base: The base class. */ + /** @base: The base class. */ struct xe_pt_walk base; /* Input parameters for the walk */ @@ -278,14 +281,14 @@ struct xe_pt_stage_bind_walk { struct xe_vm *vm; /** @tile: The tile we're building for. */ struct xe_tile *tile; - /** @default_pte: PTE flag only template for VRAM. No address is associated */ + /** @default_vram_pte: PTE flag only template for VRAM. No address is associated */ u64 default_vram_pte; - /** @default_pte: PTE flag only template for VRAM. No address is associated */ + /** @default_system_pte: PTE flag only template for System. No address is associated */ u64 default_system_pte; /** @dma_offset: DMA offset to add to the PTE. */ u64 dma_offset; /** - * @needs_64k: This address range enforces 64K alignment and + * @needs_64K: This address range enforces 64K alignment and * granularity on VRAM. */ bool needs_64K; @@ -301,6 +304,7 @@ struct xe_pt_stage_bind_walk { u64 va_curs_start; /* Output */ + /** @wupd: Walk output data for page-table updates. */ struct xe_walk_update { /** @wupd.entries: Caller provided storage. */ struct xe_vm_pgtable_update *entries; @@ -318,7 +322,7 @@ struct xe_pt_stage_bind_walk { u64 l0_end_addr; /** @addr_64K: The start address of the current 64K chunk. */ u64 addr_64K; - /** @found_64: Whether @add_64K actually points to a 64K chunk. */ + /** @found_64K: Whether @add_64K actually points to a 64K chunk. */ bool found_64K; }; |