summaryrefslogtreecommitdiffstats
path: root/drivers/gpu
diff options
context:
space:
mode:
authorVille Syrjälä <ville.syrjala@linux.intel.com>2025-09-23 20:19:36 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2025-10-11 02:51:49 +0300
commitfa7fd8ebb6ff21f5ee4d9cba765ade96a2442ecf (patch)
tree3ed99540feffa01365380b2261364120475afe42 /drivers/gpu
parenta6d20cb1d808c4ffed5daa292da83d0e9c3d929f (diff)
downloadlinux-fa7fd8ebb6ff21f5ee4d9cba765ade96a2442ecf.tar.gz
linux-fa7fd8ebb6ff21f5ee4d9cba765ade96a2442ecf.zip
drm/i915/cdclk: Rework crtc min_cdclk handling
Update crtc min_cdclk directly from when calling intel_cdclk_update_crtc_min_cdclk() rather than doing it later from intel_compute_min_cdclk(). This will eg. allow better control over when to update the cdclk. For now we preserve the current behaviour by allowing the cdclk to decrease when any pipe needs to do a full modeset. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-15-ville.syrjala@linux.intel.com Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/display/intel_cdclk.c39
1 files changed, 17 insertions, 22 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 7f62fa25ce0c..1241dd0fb343 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -2844,8 +2844,13 @@ static int intel_cdclk_update_crtc_min_cdclk(struct intel_atomic_state *state,
{
struct intel_display *display = to_intel_display(state);
struct intel_cdclk_state *cdclk_state;
+ bool allow_cdclk_decrease = intel_any_crtc_needs_modeset(state);
+ int ret;
+
+ if (new_min_cdclk == old_min_cdclk)
+ return 0;
- if (new_min_cdclk <= old_min_cdclk)
+ if (!allow_cdclk_decrease && new_min_cdclk < old_min_cdclk)
return 0;
cdclk_state = intel_atomic_get_cdclk_state(state);
@@ -2854,9 +2859,18 @@ static int intel_cdclk_update_crtc_min_cdclk(struct intel_atomic_state *state,
old_min_cdclk = cdclk_state->min_cdclk[crtc->pipe];
- if (new_min_cdclk <= old_min_cdclk)
+ if (new_min_cdclk == old_min_cdclk)
return 0;
+ if (!allow_cdclk_decrease && new_min_cdclk < old_min_cdclk)
+ return 0;
+
+ cdclk_state->min_cdclk[crtc->pipe] = new_min_cdclk;
+
+ ret = intel_atomic_lock_global_state(&cdclk_state->base);
+ if (ret)
+ return ret;
+
*need_cdclk_calc = true;
drm_dbg_kms(display->drm,
@@ -2922,27 +2936,8 @@ static int intel_compute_min_cdclk(struct intel_atomic_state *state)
struct intel_display *display = to_intel_display(state);
struct intel_cdclk_state *cdclk_state =
intel_atomic_get_new_cdclk_state(state);
- struct intel_crtc *crtc;
- struct intel_crtc_state *crtc_state;
- int min_cdclk, i;
enum pipe pipe;
-
- for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
- int ret;
-
- min_cdclk = intel_crtc_compute_min_cdclk(crtc_state);
- if (min_cdclk < 0)
- return min_cdclk;
-
- if (cdclk_state->min_cdclk[crtc->pipe] == min_cdclk)
- continue;
-
- cdclk_state->min_cdclk[crtc->pipe] = min_cdclk;
-
- ret = intel_atomic_lock_global_state(&cdclk_state->base);
- if (ret)
- return ret;
- }
+ int min_cdclk;
min_cdclk = cdclk_state->force_min_cdclk;
min_cdclk = max(min_cdclk, cdclk_state->bw_min_cdclk);