diff options
| author | Ovidiu Bunea <ovidiu.bunea@amd.com> | 2025-11-27 18:10:02 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-12-08 14:22:47 -0500 |
| commit | fdcc620b02e2e4af77d5c81f546dddea4eb7971f (patch) | |
| tree | 5e0f639221133b84ff13ce480b3e74c2e0e03d0c /drivers/gpu | |
| parent | 3f6c060846be539fa1eab350f2e783fa724dba2f (diff) | |
| download | linux-fdcc620b02e2e4af77d5c81f546dddea4eb7971f.tar.gz linux-fdcc620b02e2e4af77d5c81f546dddea4eb7971f.zip | |
drm/amd/display: Fixes for S0i3 exit
[why & how]
Add debug flag "ignore_pg" to dcn32 PG functions.
Update default z10 support status.
Temp disable RFB features for ASIC.
Remove legacy code path.
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 6 |
2 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c index 319eb1061ba8..20bf04dac609 100644 --- a/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c @@ -120,7 +120,6 @@ void dcn35_link_encoder_setup( void dcn35_link_encoder_init(struct link_encoder *enc) { enc31_hw_init(enc); - dcn35_link_encoder_set_fgcg(enc, enc->ctx->dc->debug.enable_fine_grain_clock_gating.bits.dio); } void dcn35_link_encoder_set_fgcg(struct link_encoder *enc, bool enable) diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c index b213a2ac827a..3cd44c6602b3 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c @@ -82,6 +82,9 @@ void dcn32_dsc_pg_control( if (!dc->debug.enable_double_buffered_dsc_pg_support) return; + if (dc->debug.ignore_pg) + return; + REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); if (org_ip_request_cntl == 0) REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); @@ -168,6 +171,9 @@ void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool p if (hws->ctx->dc->debug.disable_hubp_power_gate) return; + if (hws->ctx->dc->debug.ignore_pg) + return; + if (REG(DOMAIN0_PG_CONFIG) == 0) return; |