aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/intel/Makefile
diff options
context:
space:
mode:
authorOleksij Rempel <o.rempel@pengutronix.de>2023-01-31 09:46:31 +0100
committerShawn Guo <shawnguo@kernel.org>2023-03-06 10:01:46 +0800
commit887185649c7ee8a9cc2d4e94de92bbbae6cd3747 (patch)
tree36d0ab78869b4c1d5a490b5c9bb9cf3e23b508d7 /drivers/pinctrl/intel/Makefile
parentARM: dts: imx6dl-plybas: configure ethernet reference clock parent (diff)
downloadlinux-887185649c7ee8a9cc2d4e94de92bbbae6cd3747.tar.gz
linux-887185649c7ee8a9cc2d4e94de92bbbae6cd3747.zip
ARM: dts: imx6dl-plym2m: configure ethernet reference clock parent
On this board the PHY is the ref clock provider. So, configure ethernet reference clock as input. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/pinctrl/intel/Makefile')
0 files changed, 0 insertions, 0 deletions
s/kernel/genex.S?id=31e1b3efa802f97a17628dde280006c4cee4ce5e&follow=1'>MIPS: Fix IRQ tracing when call handle_fpe() and handle_msa_fpe()YuanJunQing1-3/+3 2020-05-27MIPS: mm: add page valid judgement in function pte_modifyBibo Mao1-2/+5 2020-05-27mm/memory.c: Add memory read privilege on page fault handlingBibo Mao3-0/+21 2020-05-27mm/memory.c: Update local TLB if PTE entry existsBibo Mao3-8/+59 2020-05-27MIPS: Do not flush tlb page when updating PTE entryBibo Mao1-0/+5 2020-05-27MIPS: ingenic: Default to a generic boardPaul Cercueil1-1/+8