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authorHimal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>2023-12-12 23:55:26 +0530
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-21 11:46:09 -0500
commit20561efb0ffd199fec1caaa5a0de439fab69d89a (patch)
treee2f4408d16c9b2a37d0972d6df46b127a77b87ca /drivers
parentdrm/xe/xe2: Modify main memory to ccs memory ratio. (diff)
downloadlinux-20561efb0ffd199fec1caaa5a0de439fab69d89a.tar.gz
linux-20561efb0ffd199fec1caaa5a0de439fab69d89a.zip
drm/xe/xe2: Allocate extra pages for ccs during bo create
Incase of bo move from PL_TT to PL_SYSTEM these pages will be used to store ccs metadata from flat ccs. And during bo move to PL_TT from PL_SYSTEM the metadata will be copied from extra pages to flat ccs. This copy of ccs metadata ensures ccs remains unaltered between swapping out of bo to disk and its restore to PL_TT. Bspec:58796 v2: - For dgfx ensure system bit is not set. - Modify comments.(Thomas) v3: - Separate out patch to modify main memory to ccs memory ratio.(Matt) v4: - Update description for commit message. - Make bo allocation routine more readable.(Matt) Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/xe/xe_bo.c23
1 files changed, 14 insertions, 9 deletions
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 13ebe33bb7a2..c10aa5a63a70 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -2160,19 +2160,24 @@ int xe_bo_evict(struct xe_bo *bo, bool force_alloc)
* placed in system memory.
* @bo: The xe_bo
*
- * If a bo has an allowable placement in XE_PL_TT memory, it can't use
- * flat CCS compression, because the GPU then has no way to access the
- * CCS metadata using relevant commands. For the opposite case, we need to
- * allocate storage for the CCS metadata when the BO is not resident in
- * VRAM memory.
- *
* Return: true if extra pages need to be allocated, false otherwise.
*/
bool xe_bo_needs_ccs_pages(struct xe_bo *bo)
{
- return bo->ttm.type == ttm_bo_type_device &&
- !(bo->flags & XE_BO_CREATE_SYSTEM_BIT) &&
- (bo->flags & XE_BO_CREATE_VRAM_MASK);
+ struct xe_device *xe = xe_bo_device(bo);
+
+ if (!xe_device_has_flat_ccs(xe) || bo->ttm.type != ttm_bo_type_device)
+ return false;
+
+ /* On discrete GPUs, if the GPU can access this buffer from
+ * system memory (i.e., it allows XE_PL_TT placement), FlatCCS
+ * can't be used since there's no CCS storage associated with
+ * non-VRAM addresses.
+ */
+ if (IS_DGFX(xe) && (bo->flags & XE_BO_CREATE_SYSTEM_BIT))
+ return false;
+
+ return true;
}
/**