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authorBjorn Andersson <andersson@kernel.org>2025-08-12 09:58:37 -0500
committerBjorn Andersson <andersson@kernel.org>2025-08-12 09:58:37 -0500
commitccdba33f5c32bca06f5186eedeb15944f84db996 (patch)
tree9176bc3840820c0786cf343a603cb956aefd2410 /include/dt-bindings/clock
parentdt-bindings: clock: qcom,videocc: Add sc8180x compatible (diff)
parentdt-bindings: clock: dispcc-sc7280: Add display resets (diff)
downloadlinux-ccdba33f5c32bca06f5186eedeb15944f84db996.tar.gz
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Merge branch '20250811-sc7280-mdss-reset-v1-1-83ceff1d48de@oss.qualcomm.com' into clk-for-6.18
Merge the addition of reset constants to the SC7280 display clock controller binding through a topic branch to allow it to be included in the DeviceTree branch as well.
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/qcom,dispcc-sc7280.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,dispcc-sc7280.h b/include/dt-bindings/clock/qcom,dispcc-sc7280.h
index a4a692c20acf..9f113f346be8 100644
--- a/include/dt-bindings/clock/qcom,dispcc-sc7280.h
+++ b/include/dt-bindings/clock/qcom,dispcc-sc7280.h
@@ -52,4 +52,8 @@
/* DISP_CC power domains */
#define DISP_CC_MDSS_CORE_GDSC 0
+/* DISPCC resets */
+#define DISP_CC_MDSS_CORE_BCR 0
+#define DISP_CC_MDSS_RSCC_BCR 1
+
#endif