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| author | Aurabindo Pillai <aurabindo.pillai@amd.com> | 2024-03-05 14:38:31 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-04-26 17:22:58 -0400 |
| commit | 96557f785a7701c7e0c327bd25b701d0eb5dcee0 (patch) | |
| tree | bed67e0380ac43cec03b5b0d261f67db510236fe /include/uapi/drm | |
| parent | drm/amd: define new gfx12 uapi flags (diff) | |
| download | linux-96557f785a7701c7e0c327bd25b701d0eb5dcee0.tar.gz linux-96557f785a7701c7e0c327bd25b701d0eb5dcee0.zip | |
drm/amd: GFX12 changes for converting tiling flags to modifiers
GFX12 swizzle mode and GCC formats changed and is much simpler. Use a
seperate function for the same. Changes:
* Swizzle mode is now 3 bits only
* DCC enablement doesn't come from tiling_flags, it is always set in modifiers
* DCC max compressed block size of 128B
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/uapi/drm')
| -rw-r--r-- | include/uapi/drm/drm_fourcc.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 4168445fbb8b..d0063ac6e09f 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -1540,6 +1540,9 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) #define AMD_FMT_MOD_DCC_MAX_COMPRESSED_BLOCK_SHIFT 18 #define AMD_FMT_MOD_DCC_MAX_COMPRESSED_BLOCK_MASK 0x3 +#define AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_SHIFT 3 +#define AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_MASK 0x3 /* 0:64B, 1:128B, 2:256B */ + /* * DCC supports embedding some clear colors directly in the DCC surface. * However, on older GPUs the rendering HW ignores the embedded clear color |