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authorHector Martin <marcan@marcan.st>2025-08-21 12:15:59 +0200
committerJoerg Roedel <joerg.roedel@amd.com>2025-09-05 14:27:31 +0200
commit74a0e72f03ffd01b5d88b411f02d9b9861fdb99e (patch)
treed3652c4d1c3643e150b64a89678603481354fcb4 /include
parentiommu/apple-dart: Make the hw register fields u32s (diff)
downloadlinux-74a0e72f03ffd01b5d88b411f02d9b9861fdb99e.tar.gz
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iommu/io-pgtable-dart: Add 4-level page table support
DARTs on t602x SoCs are of the t8110 variant but have an IAS of 42, which means optional support for an extra page table level. Refactor the PTE management to support an arbitrary level count, and then calculate how many levels we need for any given configuration. Signed-off-by: Hector Martin <marcan@marcan.st> Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Sven Peter <sven@kernel.org> Reviewed-by: Neal Gompa <neal@gompa.dev> Link: https://lore.kernel.org/r/20250821-apple-dart-4levels-v2-2-e39af79daa37@jannau.net Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/io-pgtable.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h
index 138fbd89b1e6..8a823c6f2b4a 100644
--- a/include/linux/io-pgtable.h
+++ b/include/linux/io-pgtable.h
@@ -180,6 +180,7 @@ struct io_pgtable_cfg {
struct {
u64 ttbr[4];
u32 n_ttbrs;
+ u32 n_levels;
} apple_dart_cfg;
struct {