Merge tag 'coresight-next-v7.0' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next

Suzuki writes:

coresight: Updates for Linux v6.20/v7.0

This batch of CoreSight hwtracing updates contains :
 - Fine grained control of Timestamp generation in ETM4 trace, retaining backward
   compatibility
 - Feature updates for Qualcomm TPDA driver
 - Support Qualcomm Interconnect TNOC
 - Miscellaneous fixes to TMC-ETR driver

Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>

* tag 'coresight-next-v7.0' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux: (27 commits)
  coresight: tmc: Decouple the perf buffer allocation from sysfs mode
  coresight: tmc-etr: Fix race condition between sysfs and perf mode
  coresight: tmc: Add missing doc including reading and etr_mode of struct tmc_drvdata
  coresight-tnoc: Add runtime PM support for Interconnect TNOC
  coresight-tnoc: add platform driver to support Interconnect TNOC
  dt-bindings: arm: qcom: Add Coresight Interconnect TNOC
  coresight: etm3x: Fix cpulocked warning on cpuhp
  coresight: tpda: Fix intendation for sysfs interface documentation
  coresight: tpda: add sysfs node to flush specific port
  coresight: tpda: add logic to configure TPDA_SYNCR register
  coresight: tpda: add global_flush_req sysfs node
  coresight: tpda: add sysfs nodes for tpda cross-trigger configuration
  coresight: docs: Document etm4x timestamp interval option
  coresight: Extend width of timestamp format attribute
  coresight: Prepare to allow setting the timestamp interval
  coresight: Remove misleading definitions
  coresight: Interpret ETMv4 config with ATTR_CFG_GET_FLD()
  coresight: Interpret perf config with ATTR_CFG_GET_FLD()
  coresight: Don't reject unrecognized ETMv3 format attributes
  coresight: Interpret ETMv3 config with ATTR_CFG_GET_FLD()
  ...

1 files changed, 0 insertions, 24 deletions

diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h
index 89b0ac0014b0..2e179abe472a 100644
--- a/include/linux/coresight-pmu.h
+++ b/include/linux/coresight-pmu.h
@@ -22,30 +22,6 @@
 #define CORESIGHT_LEGACY_CPU_TRACE_ID(cpu)  (0x10 + (cpu * 2))
 
 /*
- * Below are the definition of bit offsets for perf option, and works as
- * arbitrary values for all ETM versions.
- *
- * Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore,
- * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and
- * directly use below macros as config bits.
- */
-#define ETM_OPT_BRANCH_BROADCAST 8
-#define ETM_OPT_CYCACC		12
-#define ETM_OPT_CTXTID		14
-#define ETM_OPT_CTXTID2		15
-#define ETM_OPT_TS		28
-#define ETM_OPT_RETSTK		29
-
-/* ETMv4 CONFIGR programming bits for the ETM OPTs */
-#define ETM4_CFG_BIT_BB         3
-#define ETM4_CFG_BIT_CYCACC	4
-#define ETM4_CFG_BIT_CTXTID	6
-#define ETM4_CFG_BIT_VMID	7
-#define ETM4_CFG_BIT_TS		11
-#define ETM4_CFG_BIT_RETSTK	12
-#define ETM4_CFG_BIT_VMID_OPT	15
-
-/*
  * Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload.
  * Used to associate a CPU with the CoreSight Trace ID.
  * [07:00] - Trace ID - uses 8 bits to make value easy to read in file.