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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-11-04 23:20:00 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-11-18 14:35:00 +0200 |
| commit | b2e8c6cd0974fc58dced08ebb3780bdf875a8a80 (patch) | |
| tree | 07c1ba25687022358a1f005fc1ba428d5baf206a /scripts/kernel-doc-xml-ref | |
| parent | drm/i915: Store DVO SRCDIM register offset under intel_dvo_device (diff) | |
| download | linux-b2e8c6cd0974fc58dced08ebb3780bdf875a8a80.tar.gz linux-b2e8c6cd0974fc58dced08ebb3780bdf875a8a80.zip | |
drm/i915: Streamline gpio_mmio_base deduction
If we ignore the BXT situation, we can observe that the only variables
affecting gpio_mmio_base is IS_VALLEVIEW and HAS_GMCH_DISPLAY. The BXT
situation we can fit into the same pattern if we change gmbus_pins_bxt[]
to house the GMCH GPIO register offsets (like we do for all other
platfotms). So let's do that.
We could even simplify the VLV situation more by including the
display_mmio_offset in the GPIO register defines, but let's leave it be
for now.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446672017-24497-13-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'scripts/kernel-doc-xml-ref')
0 files changed, 0 insertions, 0 deletions