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| author | Todd Fujinaka <todd.fujinaka@intel.com> | 2015-09-18 15:43:51 -0700 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2015-12-12 23:10:05 -0800 |
| commit | 08c991297582114a6e1220f913eec91789c4eac6 (patch) | |
| tree | 38ae1d4185d91848e43b6f3144074c199a511c1d /scripts/stackusage | |
| parent | e1000: Remove checkpatch coding style errors (diff) | |
| download | linux-08c991297582114a6e1220f913eec91789c4eac6.tar.gz linux-08c991297582114a6e1220f913eec91789c4eac6.zip | |
igb: use the correct i210 register for EEMNGCTL
The i210 has two EEPROM access registers that are located in
non-standard offsets: EEARBC and EEMNGCTL. EEARBC was fixed previously
and EEMNGCTL should also be corrected.
Reported-by: Roman Hodek <roman.aud@siemens.com>
Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'scripts/stackusage')
0 files changed, 0 insertions, 0 deletions