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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-04-11 00:48:25 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-05-30 00:48:57 +0100 |
| commit | a4b041a0e25c6e9ccd809b3cb68a98c816e0c967 (patch) | |
| tree | 32f9112487cddb668a265af4e9f5532c128ba51b /scripts/stackusage | |
| parent | ARM: l2c: always enable low power modes (diff) | |
| download | linux-a4b041a0e25c6e9ccd809b3cb68a98c816e0c967.tar.gz linux-a4b041a0e25c6e9ccd809b3cb68a98c816e0c967.zip | |
ARM: l2c: always enable non-secure access to lockdown registers
Since we always write to these during the cache initialisation, it is
a good idea to always have the non-secure access bit set. Set it in
core code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'scripts/stackusage')
0 files changed, 0 insertions, 0 deletions