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| author | Will Deacon <will.deacon@arm.com> | 2015-10-06 18:46:30 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2015-10-07 11:56:37 +0100 |
| commit | 120798d2e7d1ac87365fe5ea91b074bb42ca1eff (patch) | |
| tree | a9bbb2808e0514e6e5507c3281e00c45766e874a /scripts | |
| parent | arm64: tlb: remove redundant barrier from __flush_tlb_pgtable (diff) | |
| download | linux-120798d2e7d1ac87365fe5ea91b074bb42ca1eff.tar.gz linux-120798d2e7d1ac87365fe5ea91b074bb42ca1eff.zip | |
arm64: mm: remove dsb from update_mmu_cache
update_mmu_cache() consists of a dsb(ishst) instruction so that new user
mappings are guaranteed to be visible to the page table walker on
exception return.
In reality this can be a very expensive operation which is rarely needed.
Removing this barrier shows a modest improvement in hackbench scores and
, in the worst case, we re-take the user fault and establish that there
was nothing to do.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions