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authorPavel Fedin <p.fedin@samsung.com>2015-12-04 15:03:11 +0300
committerMarc Zyngier <marc.zyngier@arm.com>2015-12-04 16:29:37 +0000
commitbc45a516fa90b43b1898758d8b53b74c24b954e4 (patch)
treeac99c251f2a2b292166fec8227f2438fb830150c /tools/perf/scripts/python/bin/export-to-postgresql-record
parentarm64: kvm: report original PAR_EL1 upon panic (diff)
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arm64: KVM: Correctly handle zero register during MMIO
On ARM64 register index of 31 corresponds to both zero register and SP. However, all memory access instructions, use ZR as transfer register. SP is used only as a base register in indirect memory addressing, or by register-register arithmetics, which cannot be trapped here. Correct emulation is achieved by introducing new register accessor functions, which can do special handling for reg_num == 31. These new accessors intentionally do not rely on old vcpu_reg() on ARM64, because it is to be removed. Since the affected code is shared by both ARM flavours, implementations of these accessors are also added to ARM32 code. This patch fixes setting MMIO register to a random value (actually SP) instead of zero by something like: *((volatile int *)reg) = 0; compilers tend to generate "str wzr, [xx]" here [Marc: Fixed 32bit splat] Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-postgresql-record')
0 files changed, 0 insertions, 0 deletions
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