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| author | Yongqiang Sun <yongqiang.sun@amd.com> | 2019-10-26 10:19:40 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-11-19 10:12:52 -0500 |
| commit | b9e9f11c9145a2f5ffb50adf450c649fadd54e02 (patch) | |
| tree | e93617438134470b7dee9fb0b5155190960188fe /tools/perf/scripts/python/bin/export-to-sqlite-report | |
| parent | ad4e140e9bccc4a5a73651bfce913d7a3edaf0bb (diff) | |
| download | linux-b9e9f11c9145a2f5ffb50adf450c649fadd54e02.tar.gz linux-b9e9f11c9145a2f5ffb50adf450c649fadd54e02.zip | |
drm/amd/display: Add debug trace for dmcub FW autoload.
[Why & How]
1. Add trace code enum for easy debugging.
2. Add trace during uC boot up, including loading phy FW
and dmcu FW.
3. Change cache memory type back to write back,
since write through has issue when resume from S0i3 100% hang after
3.2ms.
4. Change CW3 base address to hard code value to avoid memory overlap
with cw1.
5. Change polling phy init done to infinite loop to avoid dcn hang when
dmcub uC stalled.
6. Add dmcub FW dis-assembly file to repositatory for debug purpose.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-sqlite-report')
0 files changed, 0 insertions, 0 deletions