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| author | Dillon Varone <Dillon.Varone@amd.com> | 2022-09-19 13:14:02 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-10-06 11:57:43 -0400 |
| commit | c1969fbaa57d88ddef626bb8ae313d38478d8631 (patch) | |
| tree | 712b7ab5cda9d4f8ef8c146955af1453d9e90fa1 /tools/perf/scripts/python/bin/flamegraph-record | |
| parent | drm/amd/display: Program SubVP in dc_commit_state_no_check (diff) | |
| download | linux-c1969fbaa57d88ddef626bb8ae313d38478d8631.tar.gz linux-c1969fbaa57d88ddef626bb8ae313d38478d8631.zip | |
drm/amd/display: Reorder FCLK P-state switch sequence for DCN32
[WHY?]
In some cases, DCFCLK hardmin requests are not acknowledged by SMU as
the requested clock does not have a compatible ratio with current FCLK,
and it cannot be changed as FCLK P-state is not allowed.
[HOW?]
Allow FCLK p-state change prior to changing DCFCLK hardmin.
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/flamegraph-record')
0 files changed, 0 insertions, 0 deletions