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authorSamson Tam <Samson.Tam@amd.com>2019-10-23 21:36:29 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-11-19 10:12:52 -0500
commit8d8a6af71a75e09ce5796b4ae780818865832c50 (patch)
treef0fbf41c9c9dcbb5b5fe711c30306cf00cb838ec /tools/perf/scripts/python/bin/netdev-times-record
parent7b23b0b450720ab85f582d2c7692172b41d74457 (diff)
downloadlinux-8d8a6af71a75e09ce5796b4ae780818865832c50.tar.gz
linux-8d8a6af71a75e09ce5796b4ae780818865832c50.zip
drm/amd/display: Fix stereo with DCC enabled
[Why] When sending DCC with Stereo, DCC gets enabled but the meta addresses are 0. This happens momentarily before the meta addresses are populated with a valid address. [How] Add call validate_dcc_with_meta_address() in copy_surface_update_to_plane() to check for surface address and DCC change. When DCC has changed, check if DCC enable is true but meta address is 0. If so, we turn DCC enable to false. When surface address has changed, we check if DCC enable is false but meta address is not 0. If so, we turn DCC enable back to true. This will restore DCC enable to the proper setting once the meta address is valid. Signed-off-by: Samson Tam <Samson.Tam@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/netdev-times-record')
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