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| author | Ping-Ke Shih <pkshih@realtek.com> | 2026-01-14 09:39:41 +0800 |
|---|---|---|
| committer | Ping-Ke Shih <pkshih@realtek.com> | 2026-01-22 09:33:42 +0800 |
| commit | 3b99dac7bf917df0e298412430a9fb30eee6cc97 (patch) | |
| tree | 0723fa5e0f81c591201d17288917cc72817108f2 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 1e3c50e0b491eaca8beb6b5ec9cb8261b4f1e38f (diff) | |
| download | linux-3b99dac7bf917df0e298412430a9fb30eee6cc97.tar.gz linux-3b99dac7bf917df0e298412430a9fb30eee6cc97.zip | |
wifi: rtw89: phy: add ops rtw89_phy_gen_be_v1 for RTL8922D
Define RTL8922D specific registers, including PHY base control register,
PHY status, CFO registers, and TX power registers.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260114013950.19704-4-pkshih@realtek.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
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