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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-10-14 22:18:03 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-10-16 18:20:32 +0300 |
| commit | 4157c75604c7adc87e1a5ae94074621bfad5a3fe (patch) | |
| tree | 7e3932bdc30df07c897576cd948abd317f7a064a /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 2b4c2a5e4d7b26b884f3861108becae0098e3233 (diff) | |
| download | linux-4157c75604c7adc87e1a5ae94074621bfad5a3fe.tar.gz linux-4157c75604c7adc87e1a5ae94074621bfad5a3fe.zip | |
drm/i915/cdclk: Add intel_cdclk_min_cdclk_for_prefill()
Introduce a helper to compute the min required cdclk frequency
for a given guardband size. This could be used to bump up the
cdclk in case the vblank is so small that the normally computed
minimum cdclk results in too slow a prefill.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20251014191808.12326-5-ville.syrjala@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions