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| author | Jue Wang <juew@google.com> | 2022-06-10 10:11:30 -0700 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-06-24 04:52:02 -0400 |
| commit | 4b903561ec499eef233bf690076cd71b1f8604cf (patch) | |
| tree | 2012c0ed9626ed3da2875fb10d5cdb0c44f69cc4 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | KVM: x86: Add APIC_LVTx() macro. (diff) | |
| download | linux-4b903561ec499eef233bf690076cd71b1f8604cf.tar.gz linux-4b903561ec499eef233bf690076cd71b1f8604cf.zip | |
KVM: x86: Add Corrected Machine Check Interrupt (CMCI) emulation to lapic.
This patch calculates the number of lvt entries as part of
KVM_X86_MCE_SETUP conditioned on the presence of MCG_CMCI_P bit in
MCG_CAP and stores result in kvm_lapic. It translats from APIC_LVTx
register to index in lapic_lvt_entry enum. It extends the APIC_LVTx
macro as well as other lapic write/reset handling etc to support
Corrected Machine Check Interrupt.
Signed-off-by: Jue Wang <juew@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20220610171134.772566-5-juew@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions