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| author | Daniel Palmer <daniel@0x0f.com> | 2021-02-23 15:18:25 +0900 |
|---|---|---|
| committer | Romain Perier <romain.perier@gmail.com> | 2022-02-16 19:16:33 +0100 |
| commit | 6979b5fedb92c2e8f9aa7636cea1d2cb655f6f8d (patch) | |
| tree | 26021c16e3d5ebc809594449c5215f73fadc9d77 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | dt-bindings: clk: mstar msc313 cpupll binding description (diff) | |
| download | linux-6979b5fedb92c2e8f9aa7636cea1d2cb655f6f8d.tar.gz linux-6979b5fedb92c2e8f9aa7636cea1d2cb655f6f8d.zip | |
ARM: mstar: Add cpupll to base dtsi
All MStar/SigmaStar ARMv7 SoCs have the CPU PLL at the same
place so add it to the base dtsi.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions