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| author | Yazen Ghannam <yazen.ghannam@amd.com> | 2019-08-22 00:00:01 +0000 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2019-08-23 12:55:05 +0200 |
| commit | 7574729e91468d568cc198de438feb35ef04f41a (patch) | |
| tree | ecdf3925e06343e3c7385f13c358858b664da548 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | EDAC/amd64: Decode syndrome before translating address (diff) | |
| download | linux-7574729e91468d568cc198de438feb35ef04f41a.tar.gz linux-7574729e91468d568cc198de438feb35ef04f41a.zip | |
EDAC/amd64: Cache secondary Chip Select registers
AMD Family 17h systems have a set of secondary Chip Select Base
Addresses and Address Masks. These do not represent unique Chip
Selects, rather they are used in conjunction with the primary
Chip Select registers in certain cases.
Cache these secondary Chip Select registers for future use.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Cc: James Morse <james.morse@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Tony Luck <tony.luck@intel.com>
Link: https://lkml.kernel.org/r/20190821235938.118710-7-Yazen.Ghannam@amd.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions