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| author | Taniya Das <taniya.das@oss.qualcomm.com> | 2025-08-29 13:28:03 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2025-09-03 17:13:16 -0500 |
| commit | 781c118c3ece2b546c6c41f617cccb36cb9534f1 (patch) | |
| tree | 608dd17808b9d4295557e7e7e6030b3f3e774fcf /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | clk: qcom: gcc-sdm660: Add missing LPASS/CDSP vote clocks (diff) | |
| download | linux-781c118c3ece2b546c6c41f617cccb36cb9534f1.tar.gz linux-781c118c3ece2b546c6c41f617cccb36cb9534f1.zip | |
dt-bindings: clock: Add DISPCC and reset controller for GLYMUR SoC
Add the device tree bindings for the display clock controller which are
required on Qualcomm Glymur SoC.
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250829-glymur-disp-clock-controllers-v1-1-0ce6fabd837c@oss.qualcomm.com
[bjorn: Dropped unnecessary include in DT example]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions