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| author | José Roberto de Souza <jose.souza@intel.com> | 2019-04-05 17:51:12 -0700 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2019-04-08 10:39:11 -0700 |
| commit | 7ae6ad6fbd83c74c37e70b7699248256eaa152a8 (patch) | |
| tree | eede4f84d456dec993a139dcf53d43ed14378be9 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | drm/i915/psr: Initialize PSR mutex even when sink is not reliable (diff) | |
| download | linux-7ae6ad6fbd83c74c37e70b7699248256eaa152a8.tar.gz linux-7ae6ad6fbd83c74c37e70b7699248256eaa152a8.zip | |
drm/i915/psr: Do not enable PSR in interlaced mode for all GENs
This interlaced mode restriction applies to all gens, not only to
Haswell.
Also while at it updating the debug message to.
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190406005112.27205-4-jose.souza@intel.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions