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| author | Aya Levin <ayal@mellanox.com> | 2019-02-12 22:55:45 -0800 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@mellanox.com> | 2019-02-14 12:14:42 -0800 |
| commit | a08b4ed1373dc59e3e15029bc6f135ba0f53c9a7 (patch) | |
| tree | 5965c4356a9b5ba8de5c2877364c63f99e490dfe /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | net/mlx5: Add new fields to Port Type and Speed register (diff) | |
| download | linux-a08b4ed1373dc59e3e15029bc6f135ba0f53c9a7.tar.gz linux-a08b4ed1373dc59e3e15029bc6f135ba0f53c9a7.zip | |
net/mlx5: Add support to ext_* fields introduced in Port Type and Speed register
This patch exposes new link modes (including 50Gbps per lane), and ext_*
fields which describes the new link modes in Port Type and Speed
register (PTYS).
Access functions, translation functions (speed <-> HW bits) and
link max speed function were modified.
Signed-off-by: Aya Levin <ayal@mellanox.com>
Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions