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| author | Eugen Hristev <eugen.hristev@microchip.com> | 2021-04-13 12:57:15 +0200 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2021-06-08 14:12:00 +0200 |
| commit | a911e927443477d67f4c577bfb68b0d41680f4a0 (patch) | |
| tree | 713e9bf249f49357a24376f67f9107efe5a3d3f8 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | media: atmel: atmel-isc: add his_entry to register offsets (diff) | |
| download | linux-a911e927443477d67f4c577bfb68b0d41680f4a0.tar.gz linux-a911e927443477d67f4c577bfb68b0d41680f4a0.zip | |
media: atmel: atmel-isc: add register description for additional modules
Add register description for additional pipeline modules: the
Defective Pixel Correction (DPC) and the Vertical and Horizontal Scaler(VHXS)
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions