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authorMathieu Desnoyers <mathieu.desnoyers@efficios.com>2022-11-22 15:39:13 -0500
committerPeter Zijlstra <peterz@infradead.org>2022-12-27 12:52:12 +0100
commitae31573843028ad17b1a807081c542d17fa9a83a (patch)
tree99062d94df5f08a2deb7d0fd79d9e41d7cff3560 /tools/perf/scripts/python/bin/stackcollapse-record
parentselftests/rseq: Implement rseq mm_cid field support (diff)
downloadlinux-ae31573843028ad17b1a807081c542d17fa9a83a.tar.gz
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selftests/rseq: x86: Template memory ordering and percpu access mode
Introduce a rseq-x86-bits.h template header which is internally included to generate the static inline functions covering: - relaxed and release memory ordering, - per-cpu-id and per-mm-cid per-cpu data access. This introduces changes to the rseq.h selftests API which require to update the rseq selftest programs. Similar API/templating changes need to be done for other architectures. Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20221122203932.231377-12-mathieu.desnoyers@efficios.com
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