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| author | Marc Zyngier <maz@kernel.org> | 2019-01-02 10:21:29 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2020-07-07 09:27:15 +0100 |
| commit | c10bc62ae4d2135c9db40e96a8e994164faee531 (patch) | |
| tree | 50936b23b6ae02713b81f74f11f896a94b3f49c6 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors (diff) | |
| download | linux-c10bc62ae4d2135c9db40e96a8e994164faee531.tar.gz linux-c10bc62ae4d2135c9db40e96a8e994164faee531.zip | |
arm64: Add level-hinted TLB invalidation helper
Add a level-hinted TLB invalidation helper that only gets used if
ARMv8.4-TTL gets detected.
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions