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| author | Vidya Sagar <vidyas@nvidia.com> | 2022-10-14 00:08:41 +0530 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2022-10-28 17:43:12 +0530 |
| commit | 0983529d7513e5417a5010f70582e1040c404551 (patch) | |
| tree | 93e514fd49507801a957af04ef297ab864416f3c /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | phy: qcom-qmp-usb: drop power-down delay config (diff) | |
| download | linux-0983529d7513e5417a5010f70582e1040c404551.tar.gz linux-0983529d7513e5417a5010f70582e1040c404551.zip | |
phy: tegra: p2u: Set ENABLE_L2_EXIT_RATE_CHANGE in calibration
Set ENABLE_L2_EXIT_RATE_CHANGE register bit to request UPHY PLL rate change
to Gen1 during initialization. This helps in the below surprise link down
cases,
- Surprise link down happens at Gen3/Gen4 link speed.
- Surprise link down happens and external REFCLK is cut off, which causes
UPHY PLL rate to deviate to an invalid rate.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Link: https://lore.kernel.org/r/20221013183854.21087-9-vidyas@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions