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| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2017-06-28 17:21:56 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2017-08-30 14:01:26 +0200 |
| commit | 4dc48a95fa20832c972c667efa5518bcf3ece6be (patch) | |
| tree | f9ca2fa07862f353af505159e46d3148fbc4bcbd /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | mmc: tmio: don't wait on R-Car2+ when handling the clock (diff) | |
| download | linux-4dc48a95fa20832c972c667efa5518bcf3ece6be.tar.gz linux-4dc48a95fa20832c972c667efa5518bcf3ece6be.zip | |
mmc: renesas_sdhi_core: on R-Car 2+, make use of CBSY bit
Most registers need to wait until the command is completed, not
necessarily until the bus is free. At least, R-Car 2+ SoCs can signal
that via the CBSY bit, so let's use it there instead of SCLKDIVEN to
save a little bit of delay.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions