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| author | Imre Deak <imre.deak@intel.com> | 2025-10-15 15:54:45 +0300 |
|---|---|---|
| committer | Mika Kahola <mika.kahola@intel.com> | 2025-10-16 11:46:16 +0300 |
| commit | 938a3b2252a2565f4b78dc9281b93ad71593fe5f (patch) | |
| tree | 5336a487c7995dd4482e399adfe84daecdd914c2 /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | 4fd6053274d2981d2cd65a9370a700c9fa73384c (diff) | |
| download | linux-938a3b2252a2565f4b78dc9281b93ad71593fe5f.tar.gz linux-938a3b2252a2565f4b78dc9281b93ad71593fe5f.zip | |
drm/i915/display: Fix PHY_C20_VDR_HDMI_RATE programming
The PHY_C20_VDR_HDMI_RATE registers 7:2 bits are reserved and they are
not specified as a must-be-zero field. Accordingly this reserved field
shouldn't be zeroed; to ensure that use an RMW to update the
PHY_C20_HDMI_RATE field (which is bits 1:0 of the register).
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20251015125446.3931198-7-mika.kahola@intel.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions