diff options
| author | Manasi Navare <manasi.d.navare@intel.com> | 2018-10-23 12:12:47 -0700 |
|---|---|---|
| committer | Manasi Navare <manasi.d.navare@intel.com> | 2018-10-31 16:21:13 -0700 |
| commit | b4335ec0a3ee6229a570755f8fb95dc8a7c694f2 (patch) | |
| tree | 83c447d7ec65de1e14c91eabd47ddfe40c1ab548 /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | drm/i915/icl: Fix crash when getting DPLL of a MST encoder in TC ports (diff) | |
| download | linux-b4335ec0a3ee6229a570755f8fb95dc8a7c694f2.tar.gz linux-b4335ec0a3ee6229a570755f8fb95dc8a7c694f2.zip | |
drm/i915/icl: Fix the macros for DFLEXDPMLE register bits
This patch fixes the macros used for defining the DFLEXDPMLE
register bit fields. This accounts for changes in the spec.
Fixes: a2bc69a1a9d6 ("drm/i915/icl: Add register definition for DFLEXDPMLE")
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Jose Roberto de Souza <jose.souza@intel.com>
Cc: <stable@vger.kernel.org> # v4.19+
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181023191248.26418-1-manasi.d.navare@intel.com
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions