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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-03-07 19:03:25 +0100 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-03-10 10:27:02 +0100 |
| commit | b4dc3b4b1a65fec829ee8704c7647c06a8038108 (patch) | |
| tree | 1bf0590094bf0a4be86c768da76024b33839ee56 /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | arm64: dts: r8a7796: Add CA53 L2 cache-controller node (diff) | |
| download | linux-b4dc3b4b1a65fec829ee8704c7647c06a8038108.tar.gz linux-b4dc3b4b1a65fec829ee8704c7647c06a8038108.zip | |
arm64: dts: r8a7796: Add Cortex-A53 CPU cores
This patch adds Cortex-A53 CPU cores of R8A7796 SoC, and sets a total of
6 cores (2 x Cortex-A57 + 4 x Cortex-A53).
Based on a patch by Takeshi Kihara in the BSP.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions