diff options
| author | Bin Gao <bin.gao@linux.intel.com> | 2016-11-15 12:27:24 -0800 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-11-18 10:58:31 +0100 |
| commit | f3a02ecebed7df7d5d68898628dea7a3bfcf03e3 (patch) | |
| tree | b8631d7c3aef3307b593e12b5e3255df138eac9d /tools/perf/scripts/python/bin/syscall-counts-record | |
| parent | x86/tsc: Mark Intel ATOM_GOLDMONT TSC reliable (diff) | |
| download | linux-f3a02ecebed7df7d5d68898628dea7a3bfcf03e3.tar.gz linux-f3a02ecebed7df7d5d68898628dea7a3bfcf03e3.zip | |
x86/tsc: Set TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Atom SoCs
TSC on Intel Atom SoCs capable of determining TSC frequency by MSR is
reliable and the frequency is known (provided by HW).
On these platforms PIT/HPET is generally not available so calibration won't
work at all and there is no other clocksource to act as a watchdog for the
TSC, so we have no other choice than to trust it.
Set both X86_FEATURE_TSC_KNOWN_FREQ and X86_FEATURE_TSC_RELIABLE flags to
make sure the calibration is skipped and no watchdog is required.
Signed-off-by: Bin Gao <bin.gao@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1479241644-234277-5-git-send-email-bin.gao@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'tools/perf/scripts/python/bin/syscall-counts-record')
0 files changed, 0 insertions, 0 deletions