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| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-06-18 16:32:36 +0200 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> | 2025-07-04 16:35:19 +0300 |
| commit | 80dd5911cbfdc2f6ae904341d41a7a8bd8cc546c (patch) | |
| tree | 5fd4d154662747aaab6f959ee89ab82b1a88e3dd /tools/perf/scripts/python/bin/task-analyzer-record | |
| parent | 1337d7ebfb6d083aaf751fcf0d1dab8b98c6eb8f (diff) | |
| download | linux-80dd5911cbfdc2f6ae904341d41a7a8bd8cc546c.tar.gz linux-80dd5911cbfdc2f6ae904341d41a7a8bd8cc546c.zip | |
drm/msm/dsi: Add support for SM8750
Add support for DSI on Qualcomm SM8750 SoC with notable difference:
DSI PHY PLLs, the parents of pixel and byte clocks, cannot be used as
parents before DSI PHY is configured, the PLLs are prepared and their
initial rate is set. Therefore assigned-clock-parents are not working
here and driver is responsible for reparenting clocks with proper
procedure: see dsi_clk_init_6g_v2_9().
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/659619/
Link: https://lore.kernel.org/r/20250618-b4-sm8750-display-v7-7-a591c609743d@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/task-analyzer-record')
0 files changed, 0 insertions, 0 deletions