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| author | Damon Ding <damon.ding@rock-chips.com> | 2025-02-06 11:03:30 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2025-02-06 12:04:51 +0100 |
| commit | 2efdb041019fd6c58abefba3eb6fdc4d659e576c (patch) | |
| tree | 06f9ed324785b1d31256aa64b9542a0e7eb5c3b2 /tools/perf/scripts/python/bin | |
| parent | arm64: dts: rockchip: Add HDMI0 PHY PLL clock source to VOP2 on RK3588 (diff) | |
| download | linux-2efdb041019fd6c58abefba3eb6fdc4d659e576c.tar.gz linux-2efdb041019fd6c58abefba3eb6fdc4d659e576c.zip | |
arm64: dts: rockchip: Fix label name of hdptxphy for RK3588
The hdptxphy is a combo transmit-PHY for HDMI2.1 TMDS Link, FRL Link, DP
and eDP Link. Therefore, it is better to name it hdptxphy0 other than
hdptxphy_hdmi0, which will be referenced by both hdmi0 and edp0 nodes.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Link: https://lore.kernel.org/r/20250206030330.680424-3-damon.ding@rock-chips.com
[added armsom-sige7, where hdmi-support was added recently and also
the hdptxphy0-as-dclk source I just added]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions