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| author | Robin Murphy <robin.murphy@arm.com> | 2019-08-15 19:37:24 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2019-08-19 16:52:47 +0100 |
| commit | 5114e96cb27ed71559f2b674bb3c6ee14eafe9f9 (patch) | |
| tree | f1d3f85e676cc77e1087f6bd00ff6d4c28226602 /tools/perf/scripts/python/bin | |
| parent | iommu/arm-smmu: Convert GR0 registers to bitfields (diff) | |
| download | linux-5114e96cb27ed71559f2b674bb3c6ee14eafe9f9.tar.gz linux-5114e96cb27ed71559f2b674bb3c6ee14eafe9f9.zip | |
iommu/arm-smmu: Convert GR1 registers to bitfields
As for GR0, use the bitfield helpers to make GR1 usage a little cleaner,
and use it as an opportunity to audit and tidy the definitions. This
tweaks the handling of CBAR types to match what we did for S2CR a while
back, and fixes a couple of names which didn't quite match the latest
architecture spec (IHI0062D.c).
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions