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| author | Jesse Zhang <Jesse.Zhang@amd.com> | 2026-04-03 15:58:31 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-05-11 17:54:44 -0400 |
| commit | 5d08559c910cc37673b965a0d4e8d004444d0332 (patch) | |
| tree | bfcc5274a0aa91ff3b31e651afb544dfd6e42b8f /tools/perf/scripts/python/bin | |
| parent | 6bbede02dc62a1021aeeae87ab243bd7a93c61d2 (diff) | |
| download | linux-5d08559c910cc37673b965a0d4e8d004444d0332.tar.gz linux-5d08559c910cc37673b965a0d4e8d004444d0332.zip | |
drm/amdgpu/gfx_v12_0: set gfx.rs64_enable from PFP header on GFX12
gfx_v12_0_init_microcode() always loads RS64 CP ucode but never set
adev->gfx.rs64_enable, so it stayed false and code that branches on it
(e.g. MEC pipe reset) used the legacy CP_MEC_CNTL path incorrectly.
Match GFX11: derive RS64 mode from the PFP firmware header (v2.0) via
amdgpu_ucode_hdr_version(). Log at debug when RS64 is enabled.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jesse Zhang <jesse.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit b03d53598b0d2048e8fa7303b8d0784768ec4fa6)
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions