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| author | Yifan Zha <Yifan.Zha@amd.com> | 2023-01-11 14:59:39 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-01-13 14:59:32 -0500 |
| commit | 60b73429745e94957cbebe407b072d1c972ea537 (patch) | |
| tree | 86571ff180d4bd0581a0d5874ab9f303dc83cae0 /tools/perf/scripts/python/bin | |
| parent | drm/amd/pm: Support RAS fatal error mode1 reset on smu v13_0_0 and v13_0_10 (diff) | |
| download | linux-60b73429745e94957cbebe407b072d1c972ea537.tar.gz linux-60b73429745e94957cbebe407b072d1c972ea537.zip | |
drm/amdgpu: Skip specific mmhub and sdma registers accessing under sriov
[Why]
SDMA0_CNTL and MMHUB system aperture related registers are blocked by L1 Policy.
Therefore, they cannot be accessed by VF and loged in violation.
[How]
For MMHUB registers, they will be programmed by PF. So VF will skip to program them in mmhubv3_0.
For SDMA0_CNTL which is a PF_only register, VF don't need to program it in sdma_v6_0.
Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions