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authorAnshuman Gupta <anshuman.gupta@intel.com>2020-04-17 22:58:35 +0530
committerChris Wilson <chris@chris-wilson.co.uk>2020-04-18 07:44:56 +0100
commit65bb9dd0ec7966880b68b252b9a71585f0b539e8 (patch)
tree94aee456a2eafa7ff61086c74ed5efcddbf65857 /tools/perf/scripts/python/bin
parentdrm/i915/display: Load DP_TP_CTL/STATUS offset before use it (diff)
downloadlinux-65bb9dd0ec7966880b68b252b9a71585f0b539e8.tar.gz
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drm/i915: Add ICL PG3 PW ID for EHL
Gen11 onwards PG3 contains functions for pipe B, external displays, and VGA. Add missing ICL_DISP_PW_3 for ehl_power_wells. Cc: Animesh Manna <animesh.manna@intel.com> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1737 Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20200417172835.15461-1-anshuman.gupta@intel.com
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