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| author | Vidya Sagar <vidyas@nvidia.com> | 2020-10-26 12:09:02 +0530 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-11-25 15:33:33 +0100 |
| commit | 6b26c1a034885923822f6c4d94f8644d32bc2481 (patch) | |
| tree | ec7a043adf74868cdf5ca4ea2bc2de81b4aeffd0 /tools/perf/scripts/python/bin | |
| parent | arm64: tegra: Fix GIC400 missing GICH/GICV register regions (diff) | |
| download | linux-6b26c1a034885923822f6c4d94f8644d32bc2481.tar.gz linux-6b26c1a034885923822f6c4d94f8644d32bc2481.zip | |
arm64: tegra: Fix DT binding for IO High Voltage entry
Fix the device-tree entry that represents I/O High Voltage property
by replacing 'nvidia,io-high-voltage' with 'nvidia,io-hv' as the former
entry is deprecated.
Fixes: dbb72e2c305b ("arm64: tegra: Add configuration for PCIe C5 sideband signals")
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions