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authorSinan Kaya <okaya@codeaurora.org>2018-02-27 14:14:12 -0600
committerBjorn Helgaas <helgaas@kernel.org>2018-03-05 08:10:14 -0600
commit6b2f1351af567110cec80d7c067314c633a14f50 (patch)
tree333c32d43c22310b0a758b410a7699c756e3d8be /tools/perf/scripts/python/bin
parentPCI: Add a return type for pci_reset_bridge_secondary_bus() (diff)
downloadlinux-6b2f1351af567110cec80d7c067314c633a14f50.tar.gz
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PCI: Wait for device to become ready after secondary bus reset
Setting Secondary Bus Reset of a downstream port sends a hot reset. PCIe r4.0, sec 2.3.1, Request Handling Rules, indicates that a device can return CRS Completion Status following such a reset. Wait until the device becomes ready in that situation. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de>
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