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authorRui Miguel Silva <rui.silva@linaro.org>2020-11-13 15:06:04 +0000
committerJens Wiklander <jens.wiklander@linaro.org>2020-11-25 12:51:52 +0100
commit853735e404244f5496cdb6188c5ed9a0f9627ee6 (patch)
tree35a75aa9a0bf6b1846e2ae2c1c5ba85e706cd6b2 /tools/perf/scripts/python/bin
parentLinux 5.10-rc2 (diff)
downloadlinux-853735e404244f5496cdb6188c5ed9a0f9627ee6.tar.gz
linux-853735e404244f5496cdb6188c5ed9a0f9627ee6.zip
optee: add writeback to valid memory type
Only in smp systems the cache policy is setup as write alloc, in single cpu systems the cache policy is set as writeback and it is normal memory, so, it should pass the is_normal_memory check in the share memory registration. Add the right condition to make it work in no smp systems. Fixes: cdbcf83d29c1 ("tee: optee: check type of registered shared memory") Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions
'>ASoC: codecs: ad193x: make two arrays static const, makes object smallerColin Ian King1-2/+2 2019-09-09ASoC: es8316: support fixed and variable both clock ratesKatsuhiro Suzuki1-15/+20 2019-09-09ASoC: es8316: fix redundant codes of clockKatsuhiro Suzuki2-18/+16 2019-09-05ASoC: SOF: imx8: Fix COMPILE_TEST errorYueHaibing1-1/+2 2019-09-05ASoC: meson: tdmout: add sm1 supportJerome Brunet1-19/+84 2019-09-05ASoC: meson: axg-toddr: add sm1 supportJerome Brunet1-0/+68 2019-09-05ASoC: meson: axg-frddr: add sm1 supportJerome Brunet3-1/+75 2019-09-05ASoC: meson: tdmin: expose all 16 inputsJerome Brunet1-13/+34 2019-09-05ASoC: meson: axg-toddr: expose all 8 inputsJerome Brunet1-8/+7 2019-09-05ASoC: meson: axg-frddr: expose all 8 outputsJerome Brunet1-8/+24 2019-09-05ASoC: meson: add reset bindingJerome Brunet5-1/+15 2019-09-05ASoC: meson: add sm1 compatiblesJerome Brunet6-6/+14 2019-09-05ASoC: qcom: common: Include link-name in error messagesBjorn Andersson1-11/+11 2019-09-04ASoC: soc-core: add comment to jack at soc_remove_component()Kuninori Morimoto1-0/+2 2019-09-04ASoC: tegra: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-3/+2 2019-09-04ASoC: sirf-audio: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-3/+1 2019-09-04ASoC: ep93xx: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-3/+1 2019-09-04ASoC: amd: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-2/+1 2019-09-03ASoC: es8316: add clock control of MCLKKatsuhiro Suzuki1-1/+35