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| author | Radhakrishna Sripada <radhakrishna.sripada@intel.com> | 2023-12-07 14:10:25 -0800 |
|---|---|---|
| committer | Radhakrishna Sripada <radhakrishna.sripada@intel.com> | 2023-12-08 10:59:52 -0800 |
| commit | 872ee9cc0219334486e19da20e56665e612fdcb7 (patch) | |
| tree | dd1a059229a34520e60258819fb5115644a37b5a /tools/perf/scripts/python/bin | |
| parent | drm/i915/mtl: Remove misleading "clock" field from C20 pll_state (diff) | |
| download | linux-872ee9cc0219334486e19da20e56665e612fdcb7.tar.gz linux-872ee9cc0219334486e19da20e56665e612fdcb7.zip | |
drm/i915/mtl: Rename the link_bit_rate to clock in C20 pll_state
With the cleanup of the misleading clock value to avoid extra
calculations to convert between link_bit_rate and clock, use
one standard "clock" field for the c20 pll which works with
crtc_state->port_clock field.
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231207221025.2032207-4-radhakrishna.sripada@intel.com
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions