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| author | Kajol Jain <kjain@linux.ibm.com> | 2022-06-10 19:11:09 +0530 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2022-06-29 08:57:45 +1000 |
| commit | 8eaca8c4b4ed9a2058e4f232d56b5973191fec37 (patch) | |
| tree | 5c2176dd4f3c00cbdd012354f7bf1a603295e23f /tools/perf/scripts/python/bin | |
| parent | selftests/powerpc/pmu: Add selftest for group constraint check for MMCR1 cach... (diff) | |
| download | linux-8eaca8c4b4ed9a2058e4f232d56b5973191fec37.tar.gz linux-8eaca8c4b4ed9a2058e4f232d56b5973191fec37.zip | |
selftests/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_cmp field
Thresh compare bits for a event is used to program thresh compare field
in Monitor Mode Control Register A (MMCRA: 9-18 bits for power9 and
MMCRA: 8-18 bits for power10). When scheduling events as a group, all
events in that group should match value in thresh compare bits.
Otherwise event open for the sibling events will fail.
Testcase uses event code "0x401e0" as leader and another event "0x101ec"
as sibling event, and checks for thresh compare constraint via perf
interface.
Signed-off-by: Kajol Jain <kjain@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220610134113.62991-32-atrajeev@linux.vnet.ibm.com
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions