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| author | Dillon Varone <Dillon.Varone@amd.com> | 2022-12-08 13:46:47 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-01-17 15:37:46 -0500 |
| commit | 95c454ca923bf6752180398eb4e4b86ea7be3641 (patch) | |
| tree | d7445614373d8dc358947037fbcc48bb3ed16505 /tools/perf/scripts/python/bin | |
| parent | drm/amd/display: Optimize subvp and drr validation (diff) | |
| download | linux-95c454ca923bf6752180398eb4e4b86ea7be3641.tar.gz linux-95c454ca923bf6752180398eb4e4b86ea7be3641.zip | |
drm/amd/display: Account for DCC Meta pitch in DML MALL surface calculations
DML incorrectly uses surface width for determining DCC meta size in MALL
allocation calculations. Meta pitch should be used instead.
Tested-by: Daniel Wheeler <Daniel.Wheeler@amd.com>
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions