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| author | Matt Roper <matthew.d.roper@intel.com> | 2022-10-14 16:02:33 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2022-10-17 10:14:24 -0700 |
| commit | a9e69428b1b4bb0fcf5a55f13d87557de723d7ed (patch) | |
| tree | 9f0f6b4cc8bb2c346b625dd67c7bd9f0351d5a54 /tools/perf/scripts/python/bin | |
| parent | drm/i915/gt: Add intel_gt_mcr_wait_for_reg_fw() (diff) | |
| download | linux-a9e69428b1b4bb0fcf5a55f13d87557de723d7ed.tar.gz linux-a9e69428b1b4bb0fcf5a55f13d87557de723d7ed.zip | |
drm/i915: Define MCR registers explicitly
Rather than using the same _MMIO() macro to define MCR registers as
singleton registers, let's use a new MCR_REG() macro to make it clear
that these registers are special and should be handled accordingly. For
now MCR_REG() will still generate an i915_reg_t with the given offset,
but we'll change that in future patches.
Bspec: 66673, 66696, 66534, 67609
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221014230239.1023689-9-matthew.d.roper@intel.com
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions