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| author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2017-04-18 02:18:19 +0000 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-04-19 10:18:52 -0700 |
| commit | d127967a7b18598b8922bf9a4b984fae899787dc (patch) | |
| tree | 019cd10427ab72fd1968d6032648766a9a50af92 /tools/perf/scripts/python/bin | |
| parent | clk: qcom: add parent for venus core0 and core1 gdsc's (diff) | |
| download | linux-d127967a7b18598b8922bf9a4b984fae899787dc.tar.gz linux-d127967a7b18598b8922bf9a4b984fae899787dc.zip | |
clk: cs2000: enable clock skipping mode
CLK_IN skipping mode allows the PLL to maintain lock even when the
CLK_IN signal has missing pulses for up to 20 ms (t CS) at a time.
This patch enables it
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions